1. Field of the Invention
This invention relates to an electrostatic damage protection device, particularly to such a device provided for a terminal where a high voltage is inputted or outputted.
2. Description of the Related Art
A semiconductor integrated circuit such as a DC-DC converter and an LCD driver has a terminal where a higher voltage (e.g. 20V or more) than the normal power supply voltage (3V or 5V) is inputted or outputted, a transistor for inputting or outputting such a high voltage through the terminal, and also an electrostatic damage protection device for protecting such a transistor from an electrostatic damage.
FIG. 5 is a circuit diagram of an electrostatic damage protection device of the conventional art. A numeral 100 designates an output terminal, a numeral 110 designates an output MOS transistor having a high withstand voltage connected with this output terminal 100, a numeral D1 designates a first diode having a high withstand voltage where a cathode is connected with the output terminal 100 and an anode is connected with a ground potential Vss. A numeral D2 designates a second diode having a high withstand voltage where an anode is connected with the output terminal 100 and a cathode is connected with a high power supply potential HVdd (e.g. 20V). These first and second diodes D1 and D2 having a high withstand voltage form the electrostatic damage protection device. The reason for using the first and second diodes D1 and D2 having a high withstand voltage is to prevent a breakdown of the diodes caused by a high voltage applied to the output terminal 100 during the normal operation.
In this electrostatic damage protection device, when a surge voltage is applied from outside to the output terminal 100, either one of the first or second diode D1 or D2 turns on in a forward direction and another generates a breakdown in a reverse direction according to a polarity of the surge voltage, so that an electric charge generated by the surge voltage is led to a power supply line or a ground line, thereby preventing the output transistor 110 from being applied with the high voltage and damaged.
FIG. 6 is a circuit diagram of other electrostatic damage protection device of the conventional art. It is noted that the same numerals are provided to the same components as those in FIG. 5. This electrostatic damage protection device has a first MOS transistor having a high withstand voltage of an N-channel type Tr1 where a drain is connected with an output terminal 100 and a source and a gate are connected with a ground potential Vss, and a second MOS transistor having a high withstand voltage of a P-channel type Tr2 where a drain is connected with the output terminal 100 and a source and a gate are connected with a high power supply potential HVdd. The reason for using the first and second transistors Tr1 and Tr2 having a high withstand voltage is to prevent a breakdown of the transistors caused by a high voltage applied to the output terminal 100 during the normal operation.
In this electrostatic damage protection device, when a surge voltage is applied from outside to the output terminal 100, either one of the first and second MOS transistor Tr1 or Tr2 turns on and another generates a breakdown between the source and the drain according to a polarity of the surge voltage, so that an electric charge generated by the surge voltage is led to a power supply line or a ground line, thereby preventing the output MOS transistor 110 from being applied with the high voltage and damaged.
However, in the electrostatic damage protection device shown in FIG. 5, resistance of the first and second diode D1 and D2 are large, thereby providing a difficulty in leading the electric charge generated by the surge voltage to the power supply line and so on. This causes such problems that this electrostatic damage protection device can not protect the output MOS transistor enough and the first and second diode D1 and D2 themselves are easily damaged.
Furthermore, in the electrostatic damage protection device shown in FIG. 6, the resistance of the source and the drain of the first and second MOS transistors Tr1 and Tr2 are large, so that there arises such a problem that the damage can easily occur in the first and second MOS transistors Tr1 and Tr2, particularly in surface portions of the drains of these transistors.
Furthermore, in the electrostatic damage protection device shown in FIGS. 5 and 6, although electrostatic damage protection characteristics can be improved by designing the large-sized first and second diodes D1 and D2 and the large-sized first and second MOS transistors Tr1 and Tr2 to reduce resistance thereof, this causes a problem of increasing a chip area in the semiconductor integrated circuit.